The progress in producing integrated circuit chips with more functionalities per chip area has been promoted by continual scaling of device features. During the course of scaling down the device features, non-planar semiconductor devices such as fin field effect transistors (FinFETs) and nanowire field effect transistors (nanowire FETs) are developed to mitigate short channel effects, and to increase on-state current, thereby allowing further scaling of the device features. Accompanying with such development, critical dimensions of lines and spacings between the lines and ends of lines are also scaled down. However, the reduced spacings between gates of non-planar transistors and ends of gates may cause occurrences of bridging defects to increase, and leakage currents to tunnel through dielectric material in the spacings.
Like reference symbols in the various drawings indicate like elements.